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Sebastian Meisner and Marco Platzner. Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level. In Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on, pages 1–8, December 2016. ReConFig.
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BibTeX |
doi:10.1109/ReConFig.2016.7857193
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Sebastian Meisner and Marco Platzner. Comparison of thread signatures for error detection in hybrid multi-cores. In Field Programmable Technology (FPT), 2015 International Conference on, pages 212–215, December 2015. FPT.
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doi:10.1109/FPT.2015.7393153
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Jahanzeb Anwer, Marco Platzner and Sebastian Meisner. FPGA Redundancy Configurations: An Automated Design Space Exploration. In Reconfigurable Architectures Workshop (RAW), May 2014. RAW.
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doi:10.1109/IPDPSW.2014.37
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Sebastian Meisner and Marco Platzner. Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection. In Proceedings of the International Symposium on Applied Reconfigurable Computing, April 2014. ARC.
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BibTeX |
doi:10.1007/978-3-319-05960-0_30
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Jahanzeb Anwer, Sebastian Meisner and Marco Platzner. Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. In Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on, pages 1–6, December 2013.
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doi:10.1109/ReConFig.2013.6732280
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Tim Süß, Andrew Schoenrock, Sebastian Meisner and Christian Plessl. Parallel Macro Pipelining on the Intel SCC Many-Core Computer. In Parallel and Distributed Processing Symposium Workshops PhD Forum (IPDPSW), 2013 IEEE 27th International, pages 64–73, May 2013. IEEE Computer Society.
BibTeX |
doi:10.1109/IPDPSW.2013.136